The present invention relates to pogo probe cards used for probing test subject workpieces, such as wafers of integrated circuit dies (“IC wafer dies”), and in particular relates to pogo probe cards suitable for use in measuring current as low as the femtoamp order of magnitude (ultra-low current).
Typically, a pogo probe card includes a dielectric board having top and bottom major surfaces and forming a base for other elements. A plurality of probing devices are mounted in radial arrangement about the top rim of a round central opening in the board. A probing needle for each of these devices terminates below the opening in a pattern suitable for probing contact sites, otherwise referred to as test sites, of an IC wafer die. For ease of description in this application the portion of the pogo probe card which in operation is closest to the IC wafer is denoted as the bottom of the card, although other geometries of test are possible.
Around the exterior periphery of the pogo probe card there are typically 48, 64 or 96 pogo pin receptive pads or pad sets, each of which is electrically connected to a respective one of the probing devices by a signal trace or set of traces. During testing, a mating pogo test head with a matching set of 48, 64 or 96 pogo pins or pin sets, touches the pogo probe card so that the pogo pins make electrical contact with the receptive pads. In this manner the probing devices are individually connected to respective channels of a test instrument by the pogo pin sets and further cabling.
In one conventional type of setup for testing IC wafer dies, the pogo probe card is mounted by a supporting rig above the IC wafer, and a chuck supports and moves the IC wafer so that each die, or region to be tested, is consecutively brought into contact with the probing needles.
As integrated circuitry has been made smaller, a need has developed for test devices which can measure ultra-low current. The typical use for this type of device is to measure IC leakage currents. These are currents that flow away from the intended current path within the IC, typically due to design flaws or fabrication artifacts.
Low-current measurements are typically performed with two conductive paths (“force” and “sense”) either reaching the test site independently (“true Kelvin” connection) or joining together in the proximity of the test site (“quasi Kelvin” connection) to form a “signal path.” The force path, whose test equipment terminus has a relatively low impedance, is provided with a particular current. The sense path, whose test equipment terminus has a very high impedance, measures the voltage at the test site. As such, the current versus voltage characteristics of the test device can be obtained using the force and sense paths.
This test configuration is desirable because although small variations in current are being measured, the amount of current directed to the test site might be large enough so that there is a significant voltage drop through the signal line leading to the test site. Because this signal line typically includes solder connections and pogo pin contacts, its resistance is impossible or impractical to predict using current technology. Therefore, the distance from the test site to the point at which the signal path splits into force and sense path is a determinant of test quality, referred to in the low-current test industry as the degree to which the test configuration approaches the ideal “true kelvin” configuration in which the force and sense paths are connected by the conductive test site itself.
Collectively, the force and sense paths are referred to as the signal path(s). On pogo probe cards the force and sense paths are typically in the form of conductive traces, both of which are on the top surface of the card.
Designers of ultra-low current probe cards have been concerned with reducing probe card leakage currents. These are unwanted currents that can flow into a first force or sense path from nearby conductive path sets, thereby distorting the current measured in the first force or sense path. The amount of leakage current between two conductive path sets is dependant on the resistivity of the insulating material that separates the paths. When measuring in the femtoamp order of magnitude, even materials which are generally thought of as being completely insulative, such as rubber or glass-epoxy, may permit a detrimental flow of leakage current.
To protect a test station from electromagnetic interference, elaborate shielding has been developed. U.S. Pat. No. 5,345,170, which is assigned to the same assignee as the present application, describes one such design.
One technique that has been used for suppressing interchannel leakage currents on pogo probe cards is providing “guard” traces on both sides of a force or sense trace on the top surface of the card which is maintained at the same potential as the signal trace on the top surface of the card by a feedback circuit in the output channel of the test instrument. Because the voltage potentials of the outer guard traces on both sides of a force or sense trace on the top surface of the card and the inner signal trace are made to substantially track each other, negligible leakage current will flow across the dielectric material of the card that separates these traces.
Although leakage current can still flow between neighboring guard traces, this is typically not a problem because these guard conductors, unlike the inner signal trace, are at low impedance. By using this guarding technique, significant improvement may be realized in the low-level current measuring capability of pogo probe cards.
Low current pogo probe cards that have force, sense, and guard traces have a “pad set” for each signal channel consisting of a force, sense, and guard pad and a corresponding “trace set” consisting of a guard trace and a combined force and sense trace.
To further improve low-current measurement capability, pogo probe cards have been constructed so as to minimize leakage currents between the individual probing devices that mount the probing needles or other needles. In these devices, higher-resistance ceramic insulating materials have been substituted for lower-resistance materials and additional guard channel conductive surfaces have been added.
In one type of assembly, for example, each probing device is constructed using a thin “blade” of ceramic material, which is a material known to have a relatively high volume resistivity. An elongate conductive trace is provided on one side of the “blade” to form the signal line and a backplane conductive surface is provided on the other side of the “blade” for guarding purposes.
The probing element of this device is formed by a slender conductive needle, such as of tungsten, which extends in a cantilevered manner away from the signal trace. Such devices are commercially available, for example, from Cerprobe Corporation based in Tempe, Ariz. During assembly of the probe card, the ceramic blades are edge-mounted in radial arrangement about the opening in the card so that the needles terminate below the opening in a pattern suitable for probing the test device.
The conductive backplane on each blade is connected to the guard trace of the corresponding pogo pin set and also to a corresponding conductive pad or “land” adjacent the central opening in the probe card. In this manner each conductive signal line is guarded by the conductive backplane on the opposite side of the blade and by the conductive land beneath it.
It has been found, however, that even with the use of guard traces and ceramic probing devices, the level of undesired leakage current is still not reduced sufficiently to match the femtoamp range measurement capabilities of the latest generation of commercially available test instruments. Thus, it has become evident that other changes in pogo probe card design are needed in order to keep pace with the technology of test instrument design.
In an additional design for a pogo probe card, each guard trace is connected by a series of plated vias through the probe card to an auxiliary guard trace that is formed on the bottom exterior surface of the card. The auxiliary guard traces parallel respective signal traces toward the center of the card.
This design leaves a number of problems still unresolved. First, leakage current may flow between the plated vias through the dielectric material that separates each guard trace from the corresponding auxiliary guard trace.
Second, the capacitance between traces of neighboring trace sets permits cross-talk. This means that a change in electric potential in a first trace set will cause a temporary change in potential in the trace of neighboring trace sets, potentially corrupting a test result.
Third, the dielectric absorption of the probe card material adjacent or interposed between neighboring trace sets results in a delay in charging and discharging the trace sets to a predetermined potential. In essence, the dielectric absorption forms a capacitor that must be charged or discharged to reach a different voltage. A test sequence for a particular IC wafer may include hundreds of brief tests. A delay of 1 second or a fraction thereof in the performance of each test, may substantially increase the total test time. By reducing the settling time of the trace sets, it may be possible to run the same number of test sequences in less time and with fewer test stations.
An additional problem encountered in prior art probe cards is the problem of probing needle damage. Probing needles occasionally break, or are otherwise damaged during testing, requiring replacement or repair. In currently available probe cards, when a probing needle breaks, the entire probing device must be replaced which is time consuming and expensive.
What is desired, therefore, is a pogo probe card with increased isolation between traces resulting in reduced leakage currents, reduced cross-talk between trace sets, and reduced settling time for each trace set.